 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| 1. general description the TDA9917 is a differential, high-speed, 8-bit analog-to-digital converter (adc) optimized for telecommunication transmission control systems and tape drive applications. the TDA9917 offers the selection between low-voltage differential signals (lvds) and 1.8 v complementary metal oxide semiconductor (cmos) levels interface for the clock. the output data interface is 1.8 v cmos levels. it allows to sample the signal up to 250 msample/s. all static digital inputs (clksel, ccssel, ce_n, otc, del0 and del1) are 1.8 v cmos compatible. the TDA9917 offers the most possible ?exible acquisition control system thanks to its programmable complete conversion signal (ccs) that allows to adjust the delay of the acquisition clock and its frequency. the TDA9917 is released in htqfp48 package. 2. features n 8-bit resolution n high-speed sampling rate up to 250 msample/s n maximum analog input frequency up to 450 mhz n programmable acquisition output clock (complete conversion signal) n differential analog input n integrated voltage regulator or external control for analog input full-scale n integrated voltage regulator for input common-mode reference n selectable 1.8 v cmos or lvds clock input n 1.8 v cmos digital outputs n 1.8 v cmos compatible static digital inputs n binary or twos complement cmos outputs n only 2 clock cycles latency n industrial temperature range from - 40 cto+85 c n htqfp48 package 3. applications n 2.5g and 3g cellular base infrastructure radio transceivers n wireless access systems n fixed telecommunication n optical networking n wireless local area network (wlan) infrastructure TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) rev. 01 9 june 2006 objective data sheet
TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 2 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) n tape drive 4. ordering information 5. block diagram table 1. ordering information type number sampling frequency package name description version TDA9917hw/12/c1 125 msample/s htqfp48 plastic thermal enhanced thin quad ?at package; 48 leads; body 7 7 1 mm; exposed die pad sot545-2 TDA9917hw/25/c1 250 msample/s fig 1. block diagram 8 8 001aab890 track and hold adc core latch latch resistor ladders clock driver outputs enable cmadc reference fsref reference TDA9917 u/i inn in del0 del1 ccs 17 39 38 19 29 30 33 32 37 36 40 26 21 20 ccssel d0 to d7 otc ir cmadc fsref clksel clk+ clk - ce_n latch TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 3 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 6. pinning information 6.1 pinning 6.2 pin description fig 2. pin con?guration TDA9917hw ognd clksel d3 i.c. i.c. v cca1(3v3) v cco1(1v8) in d4 inn i.c. agnd2 ognd2 fsref d5 cmadc i.c. agnd1 dgnd v cco2(1v8) nc1v8 d6 ccssel i.c. n.c. v cco3(1v8) i.c. d7 d2 i.c. ognd4 ognd3 i.c. ccs d1 i.c. v cco4(1v8) ce_n i.c. ir d0 otc del1 dgnd1 del0 v ccd1(1v8) n.c. clk - clk+ 001aab891 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 48 47 46 45 44 43 42 41 40 39 38 37 24 table 2. pin description symbol pin type description ognd1 1 g data output ground 1 d3 2 o data output bit 3 i.c. 3 - internally connected; leave open v cco1(1v8) 4 p data output supply voltage 1 (1.8 v) d4 5 o data output bit 4 i.c. 6 - internally connected; leave open ognd2 7 g data output ground 2 d5 8 o data output bit 5 i.c. 9 - internally connected; leave open v cco2(1v8) 10 p data output supply voltage 2 (1.8 v) d6 11 o data output bit 6 i.c. 12 - internally connected; leave open v cco3(1v8) 13 p data output supply voltage 3 (1.8 v) d7 14 o data output bit 7 TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 4 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) i.c. 15 - internally connected; leave open ognd3 16 g data output ground 3 ccs 17 o complete conversion signal output i.c. 18 - internally connected; leave open ce_n 19 i(cmos) chip enable input (active low) ir 20 o(cmos) in-range output otc 21 i(cmos) control input for twos complement output (active high) dgnd1 22 g digital ground 1 v ccd1(1v8) 23 p digital supply voltage 1 (1.8 v) n.c. 24 - not connected n.c. 25 - not connected ccssel 26 i(cmos) control input for ccs frequency selection nc1v8 27 i not connected or connected to v ccd1(1v8) agnd1 28 g analog ground 1 cmadc 29 o regulator common-mode adc output fsref 30 i full-scale reference voltage input agnd2 31 g analog ground 2 inn 32 i complementary analog input in 33 i analog input v cca1(3v3) 34 p analog supply voltage 1 (3.3 v) i.c. 35 - internally connected; leave open clksel 36 i(cmos) control input for input clock selection clk+ 37 i clock input clk - 38 i complementary clock input del0 39 i(cmos) complete conversion signal delay input 0 del1 40 i(cmos) complete conversion signal delay input 1 d0 41 o data output bit 0 i.c. 42 - internally connected; leave open v cco4(1v8) 43 p data output supply voltage 4 (1.8 v) d1 44 o data output bit 1 i.c. 45 - internally connected; leave open ognd4 46 g data output ground 4 d2 47 o data output bit 2 i.c. 48 - internally connected; leave open dgnd - g digital ground; exposed die pad table 3. pin type description type description i input o output i(cmos) 1.8 v cmos level input table 2. pin description continued symbol pin type description TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 5 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 7. limiting values [1] the supply voltages v cca and v ccd may have any value between - 0.5 v and +7.0 v provided that the supply voltage differences d v cc are respected. [2] the supply voltage v cco may have any value between - 0.5 v and +5.0 v provided that the supply voltage differences d v cc are respected. 8. thermal characteristics o(cmos) 1.8 v cmos level output p power supply g ground table 3. pin type description continued type description table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v cca analog supply voltage [1] TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 6 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 9. static characteristics table 6. static characteristics v cca = 3.0 v to 3.6 v; v ccd = 1.65 v to 1.95 v; v cco = 1.65 v to 1.95 v; pins agnd1, agnd2 and dgnd1 shorted together; t amb = - 40 c to +85 c; v i(in) - v i(inn) = 2.0 v - 0.5 db; v i(cm) = 0.95 v; v ref(fs) = 0 v; typical values are measured at v cca = 3.3 v and v ccd =v cco = 1.8 v, t amb =25 c and c l = 10 pf; unless otherwise speci?ed. symbol parameter conditions min typ max unit supplies v cca analog supply voltage 3.0 3.3 3.6 v v ccd digital supply voltage 1.65 1.8 1.95 v v cco output supply voltage 1.65 1.8 1.95 v i cca analog supply current - 56 TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 7 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) [1] the circuit has two clock inputs: clk+ and clk - . there are 2 modes of operation: a) lvds mode: clk+ and clk - inputs are at differential lvds levels. an external resistor between 80 w and 120 w is needed. b) 1.8 v cmos mode: clk+ input is at 1.8 v cmos level and sampling is taken on the rising edge of the clock input signal. in that case pin clk - has to be grounded. [2] | v gpd | represents the ground potential difference voltage. this is the voltage that results from current ?owing through the ?nite resistance and the inductance between the receiver and the driver circuit ground voltages. [3] guaranteed by design. [4] the adc input range can be adjusted with an external reference voltage supplied to pin fsref. this voltage has to be referen ced to agnd. 10. dynamic characteristics voltage controlled regulator output: pin cmadc v o(cm) common-mode output voltage - 0.95 - v reference voltage input: pin fsref [4] v ref(fs) full-scale reference voltage internal reference - 0 - v external reference - 1.25 - v i i(fsref) input current on pin fsref - 12 - m a v i(p-p)(max) maximum peak-to-peak input voltage TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 8 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) t d(o) output delay time 1.8 v cmos clock - 5.7 6.9 ns lvds clock - 6.4 7.3 ns timing complete conversion signal: pin ccs (see figure 4 ) f ccs(max) maximum ccs frequency 125 - - msample/s t d(o) output delay time del0 = high; del1 = low - 0 - ns del0 = low; del1 = high - 1 - ns del0 = high; del1 = high - 2 - ns 3-state output delay time: pin ccs and ir t dzh ?oat to active high delay time - 2.1 - ns t dzl ?oat to active low delay time - 2.2 - ns t dhz active high to ?oat delay time - 3.3 - ns t dlz active low to ?oat delay time - 2.9 - ns analog signal processing (50 % clock duty factor); see section 11 inl integral non-linearity f clk = 20 msample/s; f i = 21.4 mhz - 0.9 TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 9 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) [1] output data acquisition: the output data is available after the maximum delay of t d(o) . [2] the - 3 db analog bandwidth is determined by the 3 db reduction in the reconstructed output, the input being a full-scale sine wave. [3] the total harmonic distortion is obtained with the addition of the ?rst ?ve harmonics. [4] the signal-to-noise ratio takes into account all harmonics above ?ve and noise up to nyquist frequency. [5] intermodulation measured relative to either tone with analog input frequencies f i1 and f i2 . the two input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter ( - 6 db below full-scale for each input signal). imd3 is the ratio of the rms value of either input tone to the rms value of the worst case third order intermodulation product. [1] x = dont care. imd2 second-order intermodulation distortion f i1 = 74 mhz; f i2 = 76 mhz; f clk = 125 msample/s [5] - TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 10 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) the TDA9917 has an internal reference circuit which can be overruled by an external reference voltage. this could be done with the full-scale reference voltage (v ref(fs) ) according to t ab le 11 . when pin fsref is connected to ground, the circuit will switch to its internal reference. then the input common-mode will be 0.95 v and the full-scale input will be 2.0 v. the adc provides the required common-mode voltage on pin cmadc. in case of internal regulation, the regulator output voltage on pin cmadc is 0.95 v. table 10. input clock format selection control input for input clock selection input clock pin clksel pins clk+ and clk - high or not connected lvds low 1.8 v cmos; do not connect pin clk - fig 3. output timing diagram, standard mode table 11. full-scale input selection full-scale ?xed voltage v ref(fs) common-mode output voltage v o(cm) maximum input voltage amplitude v i(p-p) 1.15 v 0.8 v 1.82 v 1.20 v 0.86 v 1.91 v 1.25 v 0.94 v 1.99 v 1.30 v 1.01 v 2.08 v 1.35 v 1.09 v 2.16 v table 12. complete conversion signal selection pin del1 pin del0 pin ccs low low high-impedance low high active high low high high in, inn clk+, clk - n d0 to d7 50 % data n - 2n - 1 data data data n + 1 n t d(o) t d(s) t h(o) 001aab892 sample n sample n + 1 sample n + 2 sample n + 3 sample n + 4 TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 11 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) the TDA9917 generates an adjustable clock output called complete conversion signal (ccs), which can be used to control the acquisition of converted output data by the digital circuit connected to the TDA9917 output data bus. two logic input pins del0 and del1 allow to adjust the delay of the edge of the ccs signal to achieve an optimal position in the stable, usable zone of the data. pin clksel allows the selection of the ccs frequency; see t ab le 13 . 11. de?nitions 11.1 static parameters 11.1.1 inl (integral non-linearity) it is de?ned as the deviation of the transfer function from a best ?t straight line (linear regression computation). the inl of the code i is obtained from the equation: where: s = corresponding to the slope of the ideal straight line (code width) i = corresponding to the code value. 11.1.2 dnl (differential non-linearity) it is the deviation in code width from the value of 1 lsb. table 13. complete conversion signal frequency selection control input for ccs frequency selection (pin ccssel) ccs frequency (f ccs ) high or not connected f clk low f clk /2 fig 4. complete conversion signal timing diagram, standard mode 001aab893 ccs (f clk ) ccs (f clk /2) d0 to d7 50 % 50 % data n - 2n - 1 data data data n + 1 n t cd(o) inl i () v i i () v i ideal () C s ------------------------------------------- = TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 12 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) where: 11.2 dynamic parameters figure 5 shows the spectrum of a single tone full-scale input sine wave with frequency f t , conforming to coherent sampling (f t /f s = m/n, with m number of cycles and n number of samples, m and n being relatively prime), and digitized by the adc under test. remark: in the following equations, p noise is the power of the terms which include the effects of random noise, non-linearities, sampling time errors, and quantization noise. 11.2.1 sinad (signal-to-noise and distortion) the ratio of the output signal power to the noise plus distortion power for a given sample rate and input frequency, excluding the dc component: 11.2.2 enob (effective number of bits) it is derived from sinad and gives the theoretical resolution an ideal adc would require to obtain the same sinad measured on the real adc. a good approximation gives: dnl i () v i i1 + () v i i () C s ---------------------------------------- - = i0x2 n 2 C () = fig 5. single tone spectrum of full-scale input sine wave with frequency f t a 2 a 3 a k a 1 sfdr 001aaa518 f s /2 measured output range (mhz) magnitude sinad db [] 10 log 10 p signal p noise distorsion + ---------------------------------------- ? ?? = enob sinad 1.76 C 6.02 ---------------------------------- = TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 13 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 11.2.3 thd (total harmonic distortion) the ratio of the power of the harmonics to the power of the fundamental. for k - 1 harmonics the thd is: where: the value of k is usually 6 (i.e. calculation of thd is done on the ?rst 5 harmonics). 11.2.4 s/n (signal-to-noise ratio) the ratio of the output signal power to the noise power, excluding the harmonics and the dc component is: 11.2.5 sfdr (spurious free dynamic range) the number sfdr speci?es the available signal range as the spectral distance between the amplitude of the fundamental and the amplitude of the largest spurious harmonic and non-harmonic, excluding dc component: thd db () 10log 10 p harmonics p signal ------------------------- ? ?? = p harmonics a 2 2 a 2 3 ... a 2 k +++ = p signal a 2 1 = s / ndb [] 10log 10 p signal p noise ---------------- ? ?? = sfdr db [] 20 log 10 a 1 max s () ------------------ ? ?? = TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 14 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 11.2.6 imd2 and imd3 from a dual-tone input sinusoid (f t1 and f t2 , these frequencies being chosen according to the coherence criterion), the intermodulation distortion products imd2 and imd3 (respectively, 2nd and 3rd order components) are de?ned as follows: the ratio of the rms value of either tone to the rms value of the worst second (third) order intermodulation product. the total intermodulation distortion imd is given by: where: with: corresponding to the power in the intermodulation component at frequency f t . fig 6. spectral of dual tone input sine wave with frequency imd3 001aaa527 f s /2 measured output range (mhz) magnitude imd db [] 10log 10 p intermod p signal ---------------------- ? ?? = p intermod a im f t1 f t2 C () 2 a im f t1 f t2 + () 2 C a im f t1 2f t2 C () 2 a im f t1 2f t2 + () 2 ? +++ = ? a + im 2 f t1 f t2 C () 2 a im 2 f t1 f t2 + () 2 + a im f t1 () 2 p signal a f t1 2 a f t2 2 + = TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 15 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 12. package outline fig 7. package outline sot545-2 (htqfp48) unit a max. a 1 a 2 a 3 b p h d h e l p z d (1) z e (1) cely w v q references outline version european projection issue date iec jedec jeita mm 1.2 0.15 0.05 1.05 0.95 0.25 0.27 0.17 0.20 0.09 7.1 6.9 0.5 9.1 8.9 0.9 0.6 7 0 0.08 0.08 0.2 1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.75 0.45 sot545-2 ms-026 03-04-07 04-01-29 d (1) e (1) 7.1 6.9 9.1 8.9 d h e h 4.6 4.4 4.6 4.4 0.9 0.6 b p e q e a 1 a l p detail x l b 12 1 48 37 d h b p e h a 2 v m b d z d a c z e e v m a x 25 36 24 13 y pin 1 index w m w m 0 2.5 5 mm scale htqfp48: plastic thermal enhanced thin quad flat package; 48 leads; body 7 x 7 x 1 mm; exposed die pad sot545-2 d h e h exposed die pad side (a ) 3 TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 16 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 13. soldering 13.1 introduction to soldering surface mount packages there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for ?ne pitch smds. in these situations re?ow soldering is recommended. 13.2 re?ow soldering re?ow soldering requires solder paste (a suspension of ?ne solder particles, ?ux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. several methods exist for re?owing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. typical re?ow temperatures range from 215 cto260 c depending on solder paste material. the peak top-surface temperature of the packages should be kept below: moisture sensitivity precautions, as indicated on packing, must be respected at all times. 13.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was speci?cally developed. if wave soldering is used the following conditions must be observed for optimal results: ? use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): table 14. snpb eutectic process - package peak re?ow temperatures (from j-std-020c july 2004) package thickness volume mm 3 < 350 volume mm 3 3 350 < 2.5 mm 240 c+0/ - 5 c 225 c+0/ - 5 c 3 2.5 mm 225 c+0/ - 5 c 225 c+0/ - 5 c table 15. pb-free process - package peak re?ow temperatures (from j-std-020c july 2004) package thickness volume mm 3 < 350 volume mm 3 350 to 2000 volume mm 3 > 2000 < 1.6 mm 260 c + 0 c 260 c + 0 c 260 c + 0 c 1.6 mm to 2.5 mm 260 c + 0 c 250 c + 0 c 245 c + 0 c 3 2.5 mm 250 c + 0 c 245 c + 0 c 245 c + 0 c TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 17 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. ? for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be ?xed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated ?ux will eliminate the need for removal of corrosive residues in most applications. 13.4 manual soldering fix the component by ?rst soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the ?at part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 c and 320 c. 13.5 package related soldering information [1] for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales of?ce. [2] all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . table 16. suitability of surface mount ic packages for wave and re?ow soldering methods package [1] soldering method wave re?ow [2] bga, htsson..t [3] , lbga, lfbga, sqfp, ssop..t [3] , tfbga, vfbga, xson not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hso, hsop, hsqfp, hsson, htqfp, htssop, hvqfn, hvson, sms not suitable [4] suitable plcc [5] , so, soj suitable suitable lqfp, qfp, tqfp not recommended [5] [6] suitable ssop, tssop, vso, vssop not recommended [7] suitable cwqccn..l [8] , pmfp [9] , wqccn..l [8] not suitable not suitable TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 18 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) [3] these transparent plastic packages are extremely sensitive to re?ow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared re?ow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the re?ow oven. the package body peak temperature must be kept as low as possible. [4] these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. [5] if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. [6] wave soldering is suitable for lqfp, qfp and tqfp packages with a pitch (e) larger than 0.8 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. [7] wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is de?nitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. [8] image sensor packages in principle should not be soldered. they are mounted in sockets or delivered pre-mounted on ?ex foil. however, the image sensor package can be mounted by the client on a ?ex foil by using a hot bar soldering process. the appropriate soldering pro?le can be provided on request. [9] hot bar soldering or manual soldering is suitable for pmfp packages. 14. revision history table 17. revision history document id release date data sheet status change notice supersedes TDA9917_1 20060609 objective data sheet - - TDA9917_1 ? koninklijke philips electronics n.v. 2006. all rights reserved. objective data sheet rev. 01 9 june 2006 19 of 20 philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .semiconductors .philips .com. 15.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. philips semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local philips semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 15.3 disclaimers general information in this document is believed to be accurate and reliable. however, philips semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes philips semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use philips semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a philips semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. philips semiconductors accepts no liability for inclusion and/or use of philips semiconductors products in such equipment or applications and therefore such inclusion and/or use is for the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale philips semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .semiconductors .philips .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by philips semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 16. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation. philips semiconductors TDA9917 8-bit, up to 250 msample/s analog-to-digital converter (adc) ? koninklijke philips electronics n.v. 2006. all rights reserved. for more information, please visit: http://www.semiconductors.philips.com. for sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. date of release: 9 june 2006 document identifier: TDA9917_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 thermal characteristics. . . . . . . . . . . . . . . . . . . 5 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11.1 static parameters . . . . . . . . . . . . . . . . . . . . . . 11 11.1.1 inl (integral non-linearity) . . . . . . . . . . . . . . . 11 11.1.2 dnl (differential non-linearity) . . . . . . . . . . . . 11 11.2 dynamic parameters. . . . . . . . . . . . . . . . . . . . 12 11.2.1 sinad (signal-to-noise and distortion) . . . . . . 12 11.2.2 enob (effective number of bits) . . . . . . . . . . . 12 11.2.3 thd (total harmonic distortion). . . . . . . . . . . . 13 11.2.4 s/n (signal-to-noise ratio) . . . . . . . . . . . . . . . . 13 11.2.5 sfdr (spurious free dynamic range) . . . . . . . 13 11.2.6 imd2 and imd3. . . . . . . . . . . . . . . . . . . . . . . . 14 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 13 soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 13.1 introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 13.2 re?ow soldering . . . . . . . . . . . . . . . . . . . . . . . 16 13.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16 13.4 manual soldering . . . . . . . . . . . . . . . . . . . . . . 17 13.5 package related soldering information . . . . . . 17 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 19 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 15.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 15.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 16 contact information. . . . . . . . . . . . . . . . . . . . . 19 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 |
Price & Availability of TDA9917
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |